Semiconductors Sector Primer

Chip companies sell into a cycle that swings harder than the demand behind it, because customers over-order when chips are short and stop ordering while they work through the stock. How a business rides that cycle depends on what it owns. A designer pays for the factories inside the wafer price; a foundry or integrated maker carries their depreciation itself, so how full the fabs run sets its margin. A memory maker sells a commodity priced on the balance of supply and demand, and an equipment maker sells the tools through an order book. So a chip valuation models the cycle year by year, counts the capital each business must sink, and strikes the terminal value on a normal year rather than the latest one.

Worked example: a foundry DCF on a fictional chipmaker

Take a fictional contract chipmaker with $20B of revenue and 5.0M wafers a year of capacity running at 80%, at $5,000 a wafer. It adds 0.3M wafers of capacity a year at $15,000 a wafer, and each addition arrives two years after it is paid for. The primer runs ten years at an 8.85% WACC and strikes the terminal value on mid-cycle cash flow, with 2.5% growth.

The terminal value is 66.6% of enterprise value, the highest of the four worked examples, because the foundry spends on growth inside the forecast and harvests the return after it. How the terminal treats depreciation therefore matters. Charging year-10 depreciation gives $140.76 a share. Charging maintenance capex instead, the steady cost of keeping capacity running, gives $156.71, and counting the capacity already paid for but not yet in service gives $164.49.

The primer values a chip designer, a memory maker and an equipment maker on the same schedule, each in its own business-model mode. The memory maker shows why the terminal must sit at mid-cycle. Its operating margin runs from -24.0% in a trough year to 37.8% at the peak; struck on the peak, its terminal gives $56.64 a share, and on the trough, -$3.31, against $39.26 on the 19.9% mid-cycle margin.

Why utilisation sets a fab owner's margin

Depreciation is more than half of the fictional foundry's cost of goods, and it does not fall when the fabs run emptier. Holding year-0 capacity and price, gross margin moves like this:

Across the cycle's normal range, 72% to 88%, that is about 0.38 points of margin for each point of utilisation. The filings show the same direction. TSMC's billing utilisation fell to 81% in FY2019 with gross margin at 46.0%, then rose to 94% in FY2020 with gross margin at 53.1%. Price, mix and currency also moved, so not all of the change is utilisation.

Capital, inventory and margins: filed figures

Chip companies split on who owns the fabs, and the split shows in capital intensity. These figures are as filed, each for the fiscal year shown. Inventory days are computed from year-end balances, so every one recomputes from a single filing. TSMC reports in New Taiwan dollars and ASML in euros.

TSMC and Intel spent the same 33.4% of FY2025 revenue on capex, before Intel's partner funding, yet TSMC's operating margin was 50.8% and Intel's -4.2%. A foundry fills its fabs with many customers' designs; an integrated maker fills them mainly with its own products, so when those lose share, the fabs empty. Capital intensity alone does not set the margin. How full the fabs run at mid-cycle does.

Which model mode values which chip business

What the full primer adds

The primer builds from how chip companies make money and the business models to the industry cycle as an index, then revenue for each model, fab depreciation, memory pricing, inventory and the equipment order book. Four fictional companies are valued from first input to value per share: a chip designer, a foundry, a memory maker and an equipment maker, with sensitivities, both ways of counting stock pay and a reverse DCF. Filed figures for six listed companies follow, each with its fiscal year, then eleven screens, the red flags and a case study setting TSMC against Intel.

Free guides cover the individual pieces: the semiconductor inventory cycle, inventory days by company, fab utilisation and gross margin, capital intensity, capex to revenue by company, fabless, foundry and integrated makers, the memory pricing cycle, the wafer fab equipment cycle and peak against mid-cycle margins. Research profiles for Nvidia, TSMC, Intel, Micron, Texas Instruments and ASML read the same measures from filed results.

The companion Excel model spans thirteen sheets. It runs the four fictional companies, and a column for a company of your own in any of five modes, through the same ten-year schedule: the cycle index reaches revenue through units, utilisation, the bit balance or orders, depreciation follows the capex that creates it, and the terminal value is struck at mid-cycle. Change an input and the valuation rebuilds from the first year; the reverse DCF reads the margin and growth a typed price requires, and the sensitivity grids re-run the model in every cell.

Sheets: Quick Start, Instructions, Dashboard, Assumptions, Inputs, Paths, Engine, Value, Reverse DCF, Sensitivity, Cycle, Capital, Grid Runs.